摘要
首先简述了硬件木马以及现有的硬件木马检测方法,之后考虑了工艺偏差对硬件木马检测的影响;工艺偏差的存在对电路功耗和延时等都会造成一定的影响,从而在一定程度上掩盖了硬件木马电路引起的功耗和延时特征变化。实验中针对AES加密核心S-box电路设计植入了一种基于组合电路的功能型硬件木马电路,并在40 nm工艺下利用HSPICE模拟不同大小硬件木马电路下S-box电路功耗轨迹和延时数据,在不同工艺模式下分析基于功耗与延时检测木马的有效性。结果显示,基于延时的硬件木马检测方法在木马规模较小时更能有效实现硬件木马检测。当木马规模增大时,基于功耗的检测方法的优势更明显,其抗工艺偏差干扰的能力会更强。
First, this paper introduces the concept and present detection methods of Hardware Trojans. Then it discusses the process variation effects on circuit current and power. Those effects may cover the circuit character changes arose by Hardware Trojans. In the experiment we design a combinational function Hardware Trojan and insert it into the S-box circuit in an AES core. Then we simulate the power tracks and timing delay for various sizes of hardware Trojans with HSPICE in 40 nm processing. After that we analyze the power and timing delay detection effectiveness in different process modes. Experiment results show that the detection timing delay method is more effective when Hardware Trojans circuit is small. While the Hardware Trojan scale increasing, the power-based detection method is of valid advantage for a better anti-interference capability against process variation.
出处
《数字通信》
2014年第5期36-41,共6页
Digital Communications and Networks
基金
"核高基"国家重大专项基金资助(2012ZX01027004-003)
国防科学技术大学研究生工程创新计划基金资助
关键词
IC
硬件木马
工艺偏差
延时分析
功耗
integrated circuit, hardware trojans, process variation, delay analysis, power
