摘要
为了解决宽带数字接收机中高速采样器数据速率与现有DSP器件处理能力之间的失配问题,提出了一种基于多相滤波的宽带正交数字下变频器的解决方案。利用FPGA具有并行高速计算的能力,适合多相滤波技术,并行多路正交数字下变频。结合FPGA处理的特点优化了设计,节省了FPGA消耗的资源。经过理论分析和工程实践,验证了该方案设计的合理性和正确性,以及实现的可行性和有效性。
In order to solve the mismatch between the data rate of high speed ADC and DSP processing capabilities in widebanddigital receiver, a wideband quadrature digital down-converter structure based on polyphase filtering is introduced. The FPGA hasparallel high-speed computing capability, adapts to polyphase filtering technology and parallel multi-channel quadrature digital down-converter.Based on these features of FPGA and FPGA processing characteristics,FPGA resource consumption is reduced by usingdesign optimization.The theoretical analysis and engineering practiee prove the reasonableness and the correctness of the methodologyand the feasibility and the efficiency of the design.
出处
《无线电通信技术》
2014年第5期69-72,共4页
Radio Communications Technology
关键词
带通采样定理
多相滤波
正交数字下变频
FPGA
bandpass sampling theorem
polyphase filtering
quadrature digital down-converter
FPGA
