摘要
为使三相光伏并网逆变器在各种电网环境下准确、快速地锁定基波相位。利用三相锁相环基本结构,提出了一种在FPGA上的数字锁相环设计。通过流水线结构编写Verilog HDL硬件描述语言对dq坐标变换、PI控制器和数控振荡器在FPGA模块化实现锁相算法。并以FPGA为验证平台,分析了三相锁相环在电网故障环境中,即三相不平衡、频率突变、相位突变和电网谐波干扰等对三相锁相环技术分析得出误差。利用Matlab模拟电网故障Modelsim进行系统仿真,仿真结果验证了该锁相环能够快速准确地锁定电网基波相位,并对畸变电压具有较强的抑制作用。
For the three-phase PV grid inverters to accurately and quickly lock the fundamental phase in a variety of grid environments,a digital PLL design based on the basic structure of a three-phase locked loop in FPGA is presented. Dq transformation,PI controller,NCO module and other test modules are programmed in assembly line Verilog HDL. And FPGA is used to verify the system,the PLL output errors under distorted three-phase grid are analyzed such as the phase unbalancing,frequency-abrupt,and phase-abrupt and harmonics. Finally,the distorted grid is maltab simulated and the system modelsim simulated. The simulation results prove that the three-phase PLL can lock the grid fundamental phase fast and accurately in fault situation.
出处
《电子科技》
2014年第9期148-152,共5页
Electronic Science and Technology
