摘要
通用逻辑门具有更强的逻辑功能，相比传统逻辑门更适合作为阵列逻辑单元。单电子晶体管（SingleElectronTransistor，SET）被认为是众多纳米电子器件中的强有力竞争者。为了拓展SET的应用，减少逻辑综合所用逻辑门的种类，提出了通用逻辑门的SET电路实现方案，设计出基于sET的通用逻辑门树形结构的全比较器等电路，用Hspicer软件对所设计的电路进行仿真，结果表明，该电路具有正确的逻辑功能，为SET通用逻辑门的进一步研究应用奠定了基础。
Compared with traditional logic primitives, universal logic gates （ULGs） are suitable for logic elements in logic arrays because of powerful logic function. Single Electron Transistor （SET） is the most promising candidate for nanoelectronic devices. In order to expand application of SET, a ULG based on SET is designed. Then, a full comparator of tree-type structure using proposed ULGs is presented, and Pspice simulation has been carried out. The results show that proposed logic circuits has correct logic function, which lays a foundation for ULG＇ s application.
基金
浙江省自然科学基金项目（Y1110808）
关键词
单电子晶体管
通用逻辑门
全比较器
逻辑综合
single-electron transistor
universal logic gate
full comparator
logic synthesis
