摘要
相关器是高动态GPS接收机的关键组成部分.利用FPGA技术,研制了高动态GPS 12通道半定制相关器芯片,阐述了相关器的总体结构设计以及各模块的详细设计.采用模块化设计思想,重点设计了跟踪通道模块、时基发生器模块、寄存器组模块和地址译码模块.各个模块通过VHDL语言在FPGA中实现.实验结果表明:理论分析与实验结果是吻合的,研制的相关器配合TMS320C6713工作稳定,能够满足接收机速度为12km/s、加速度为10g、加加速度为10g/s的高动态指标.
The correlator is a key component of high dynamic GPS receiver. The GPS 12 channels semi-custom correlator chip under high dynamic condition was developed by means of FPGA technology, and the working principle and related structures of the correlator and the detailed design of each module were described. The tracking channel module, the time base generator module, the registers module and the address decoding module were designed by using modular design. VHDL language programming for each module was implemented in the FPGA. The experimental results indicated that： it was uniform with the theoretical analysis, and the correlator could work stably with the TMS320C6713, under high dynamic indicators that the velocity, accelerator and change rate of accelerator were 12 km/s, 10g, and 10g/s respectively.
出处
《微电子学与计算机》
CSCD
北大核心
2014年第2期39-45,共7页
Microelectronics & Computer
基金
江西省教育厅科学技术研究项目(GJJ10458)
江西省科技支撑计划项目(20123BBE50098)
