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基于VPX的网络传输设计 被引量:1

Design of VPX-Based Network Transmission
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摘要 为实现VPX(VITA 46系列的代称)总线形式的计算平台,对VPX的标准进行了深入研究。针对VPX所具有的开放性,将整个计算平台设计为通过控制层实现信息交换,其交换方式采用网络传输的方式。计算平台包括计算机模块、交换模块以及背板3个重要部分,由于信息交换是在这3个部分之间进行的,因此,这3个部分之间网络传输的实现是整个计算平台设计的关键。设计中采用SERDES(串行器-解串行器)方式实现网络传输,相应地,各功能模块也须采用不同的芯片和布线规则实现该种模式的传输。尤其是计算机模块的设计被分为2个阶段进行,首先在X86平台上实现SERDES传输,然后再移植到以MIPS(无内部互锁流水级的微处理器)架构为基础的国产CPU(中央处理器)平台上实现。最终将各个模块结合并搭建出VPX计算平台,经过网络测试验证,交换功能的实现和网络传输的设计是正确的。 VPX (VITA 46 series) standard is studied to implement a VPX bus computing platform. Because of the open feature in VPX standard, switching of information is routed through the control layer on the platform and the way of switching is network transmission. The computing platform encompasses three main parts, a computer mod- ule, a switch module and a backplane. SERDES (Serializer-Deserializer) mode is used for network transmission be tween the three parts to assure normal operation of the entire computing platform. Accordingly, different chips and layout guidelines are taken for different modules to complete the design. In particular, design of the computer mod- ule is divided into two phases. First, the design of SERDES transmission is completed on an X86 platform. Then, the design means is transplanted to a domestic CPU (Central Processing Unit) in MIPS (Microprocessor without In terlocked Piped Stages) platform. Finally, the compater module, switch module and backplane are combined to build the VPX platform. The switching mechanism and design of network transmission are validated in networking tests.
出处 《飞行器测控学报》 CSCD 2013年第5期414-418,共5页 Journal of Spacecraft TT&C Technology
关键词 VPX总线 背板 控制层 串行器-解串行器(SERDES) VPX bus backplane control layer Serializer Deserializer (SERDES)
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参考文献8

  • 1姬叶华.基于VPX总线的抗恶劣环境计算机[J].计算机工程,2008,34(B09):102-104. 被引量:10
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二级参考文献3

  • 1Wemekamp J. The VITA 46 Advanced Module Format[Z]. 2004. 被引量:1
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