摘要
采用0.18μmSiRFCMOS工艺设计了应用于S波段AESA的高集成度射频收发前端芯片。系统由发射与接收前端组成,包括低噪声放大器、混频器、可变增益放大器、驱动放大器和带隙基准电路。后仿真结果表明,在3.3V电源电压下,发射前端工作电流为85mA,输出1dB压缩点为5.0dBm,射频输出在2～3.5GHz频带内电压增益为6.3～9.2dB,噪声系数小于14.5dB;接收前端工作电流为50mA,输入1dB压缩点为-5.6dBm,射频输入在2～3.5GHz频带内电压增益为12～14.5dB,噪声系数小于11dB;所有端口电压驻波比均小于1.8;芯片面积1.8×2.6mm2。
This paper presents the design of a RF Transceiver front-end based on 0.18 μm Si RFCMOS process for S-band AESA. The system consists of transmitter and receiver front-end, including low noise amplifier, mixer, variable gain amplifier, drive amplifier and bandgap reference circuit. The post-simulation results indicate that, under 3.3V supply voltage, the current consumption of transmitter is 85mA, output P-ldB is 5.0dBm, and voltage gain is 6.3-9.2dB in the frequency band from2 to 3.5GHz, NF is less than 14.5dB. The receiver achieves input P-ldB of-5. 6dBm, voltage gain of 12-14.5dB, and NF of less than 11 dB, current consumption of 50mA. VSWR of all the port is less than 1.8. The chip area is 1.8 - 2.6mm2.
出处
《中国集成电路》
2013年第8期28-35,共8页
China lntegrated Circuit
