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低存储器消耗高速LDPC码译码方法 被引量:1

Memory-efficient High Speed LDPC Decoding Method
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摘要 针对目前低密度奇偶校验(LDPC)码实现方案对存储资源消耗较大的现状,在研究了经典实现方案的基础上,指出了传统实现方案中造成存储资源消耗过大的主要原因。通过对水平运算结果的存储单元进行优化,以及对传统垂直运算的运算顺序做出改进,给出了低存储器消耗的LDPC译码器实现方案,并且在该方案的实现过程中,给出了一种能够弥补速度损失的方法,使得在存储资源极大节约的同时,译码速度并没有显著降低。 Present LDCP code realization requires large storage resource.This paper gives a memory-efficient LDPC decoding method for realization based on researching of classical realization approaches,pointing out the main reason for storage resource requirement.This method modifies the storage unit of horizontal compute result and develops the order of the vertical compute,meanwhile gives a method to offset the loss of speed during the realization.This method ensures that the speed not be decreased evidently and saves the resource.
出处 《无线电工程》 2013年第7期11-14,48,共5页 Radio Engineering
基金 国家高技术研究发展计划("863"计划)资助项目(2009AA12Z149)
关键词 LDPC 存储资源 高速 数据分配 LDPC memory resource high speed data distribution
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参考文献12

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