摘要
为了满足MIMO-OFDM接收机的数字下变频设计要求,设计并实现了基于专业芯片的数字下变频方案,主要使用FPGA对GC5016芯片、A/D采样芯片进行配置和控制。同时,给出了MIMO-OFDM接收机的数字下变频原理框图、MIMO-0FDM接收机实现方案框图、GC5016内部信号处理流程图以及FPGA功能模块框图。实验结果表明,本设计方案不仅具有优良的数字下变频性能,而且具有良好的可编程能力。
In order to meet the specific requirements for digital down-conversion of MIMO-OFDM receiver, the＇program of digital down-conver- sion is designed and implemented based on ASIC. GC5016 chip and A/D sampler chip are configured and controlled by FPGA. Meanwhile the digital down-conversion schematic block diagram of MIMO-OFDM receiver, the implementation scheme of MIMO-OFDM receiver, the sig- nal processing flowchart in the GC5016 and the block diagram of FPGA functional module are presented. The experiment result shows that this scheme has not only good performance but good programmable ability in digital down-conversion.
出处
《世界科技研究与发展》
CSCD
2013年第3期333-336,共4页
World Sci-Tech R&D
