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基于负相关思想的异构电路冗余技术研究 被引量:1

Research on Selective Redundancy of Evolved Circuits Using Negative Correlation
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摘要 为提高恶劣环境下电子系统的可靠性,提出一种基于负相关思想的异构冗余电路集成设计方法.利用数字电路门级演化方法设计拓扑结构迥异的功能电路,在遗传算子中增加故障模式的相关性评估因子,选择输出故障模式差异较大的电路进行冗余集成.以2位乘法器为实验对象,演化生成多个异构电路用于三模冗余集成.进而,利用故障注入实验对比提出的负相关异构冗余与同构冗余、随机异构冗余的容错性能.发现电路规模相同时,异构冗余比同构冗余有着更好的容错性能.负相关异构冗余比随机异构冗余的容错能力更高.以上结果说明了该方法的有效性和可靠性. A new design method of selective redundancy of evolved circuits is proposed, using negative correlation to improve the fault tolerance of redundant circuits. It is a point that we combine the meansure of fitness with the simulated fault-injection making the circuits more robustness to the defined fault. Evolution is able to create sets of different circuits that when combined into an ensemble of circuits which the correlation between them is lower. The design method is proof-tested by 2)〈 2 multiplier, though the test of fault-inject, two conclusions are obtained. The first is that the different structures are more reliable the same structures. The second is that different structures using negative correlation have more satisfactory fault tolerance than those which are selected randomly. The above results show that the reliability and validity of the design method.
出处 《微电子学与计算机》 CSCD 北大核心 2013年第6期71-74,79,共5页 Microelectronics & Computer
基金 重点实验室基金项目"电磁干扰环境下SOPC系统的自适应防护方法研究"(9140C8702020803)
关键词 遗传算法 演化硬件 三模冗余 故障模拟 容错电路 genetic algorithm evolution hardware triple-module redundancy fault simulation fault-tolerant cir-cuits
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