期刊文献+

存储系统中的芯片纠错算法研究与设计 被引量:1

Survey and design of chip-error correcting algorithm in memory system
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摘要 存储器是计算机系统的重要组成部分,其信息存取的正确性对整个系统至关重要。随着计算机应用的广泛和深入,人们对系统可靠性的要求越来越高,存储器错误的检测和纠正是提高存储系统可靠性的一种有效手段。当存储器出现错误时,存储系统能够依靠纠错编码ECC来恢复出正确的数据。介绍了当前计算机存储系统所使用的几种纠错编码算法,并分析了这些算法的局限性。针对这些不足,提出了基于Bossen的2冗余b邻接错纠错码的芯片纠错编码算法,并给出了该算法的编码方法和错误译码过程,然后用Verilog HDL语言对算法进行了实现。模拟结果表明,本算法可以有效地纠正所有单字节错,并能检测大部分的多字节错。 Memory is an important part of computer systems, and it is self-evident that the accuracy of information access has meaningful effect upon the entire system. As computer applications are widely used, memory error detection and correction is an effective means to improve the reliability of storage system. The storage system can recover correct data through ECC (Error Correcting Code) when errors occur in memory. This paper introduced some ECC algorithms used in the current computer storage systems, and analyzed the limitations of these algorithms. To cover these shortages, we proposed a chip-error correcting code based on the Bossen's 2-redundant b-adjacent error coding, gave the process of coding and error correction coding of this algorithm, and then used the language of verilog HDL to do the logic design. The simulation results show that the algorithm can effectively correct all single-byte er rors, and can detect most of the multiple-byte errors.
出处 《计算机工程与科学》 CSCD 北大核心 2013年第4期24-28,共5页 Computer Engineering & Science
基金 核高基重大专项资助项目(2009ZX01028-002-002) 自然科学基金资助项目(61170045)
关键词 存储器 纠错编码 2冗余b邻接 芯片纠错 memory ECC 2-redundant b-adjacent error chip-error correction
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参考文献8

  • 1Song Huan zhang. Computer error correcting code[M]. Chang- sha: National University of Defense Technology Press, 1990. (in Chinese). 被引量:1
  • 2Wang Xin-mei, Xiao Guo-zhen. Error correcting code---prin- ciple and method[M]. Xi'an:Xidan University Press, 2002. (in Chinese). 被引量:1
  • 3Zhang Zhen, Yuan Ai-dong, Gao Jian-gang. Analysis of server memory data protection technology[J]. Silicon Valley, 2008 (12):1 2. (in Chinese). 被引量:1
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二级参考文献4

  • 1[1]Timothy J.Dell.A White Paper on the Benefits of Chipkill-Correct ECC for Pc Server Main Memory.IBM Microelectronics Division-Rev.1997-11-19. 被引量:1
  • 2[2]David Locklear.Chipkill-Correct Memory Architecture.Dell Enterprise Systems Group.2000-8. 被引量:1
  • 3[3]Fujiwara,Eiji and Taku Gohya,"Single Byte Error Correcting-Double Bit Error Detec-ting(SbEC-DED)Codes,"Proc.1991,IEEE Int.Symp.on Inform.Theory,Jun.1991,p.140. 被引量:1
  • 4[4]Chen."Symbol Error-Correcting Codes for Computer Remory Systems".IEEE.Transactions on Computers,vol.41.No.2.Feb.1992,pp.252-256. 被引量:1

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