6Xilinx Inc. Vivado design suite user guide high-level syn- thesis[ EB/OL]. http ://www. xilinx, com/support/doe- umentation/sw manuals/xilinx2012 _ 4/ug902 vivado- high-level-synthesis, pdf, 2014 08-15. 被引量:1
7AbduUah S S, Nam H, Mcdermot M, et al. A High Throughput FFT Processor with no Multipliers [C]//Computer Design, 2009. ICCD 2009. IEEE International Conference on. IEEE, 2009 : 485- 490. 被引量:1
8Xiao X, Oruklu E, Saniie J. Reduced Memory Architecture for CORDIC-Based FFT[ C ]//Circuits and Systems (ISCAS), Proceed- ings of 2010 IEEE Intematianal Symposium on. IEEE, 2010: 2690-2693. 被引量:1
9Malashri A, Paramasivam C. Low Power and Memory Efficient FFT Architecture Using Modified CORDIC Algorithm [C]//Infor- marion Communication and Embedded Systems (ICICES) , 2013 International Conference on. IEEE, 2013 : 1041-1046. 被引量:1