摘要
本设计中采用ARM芯片作为主控芯片,FPGA芯片作为主功能芯片,使用C和Verilog语言编程。通过软件控制生成IRIG-B(DC)码信号,由分频1 PPS信号和外部标准1 PPS信号锁相同步保证时标信号的同步,在产生DC码后采用基于FPGA内部ROM数字查找表技术实现AC码的数字调制。整体方案设计简单,应用方便。
In this design, an ARM chip is used as the master control chip, while an FPGA chip is used as the main functional chip, and they can be programmed by using C programming language and Verilog hardware description language respectively. The IRIG-B code signal is generated and controlled by the software, and then the frequency demultiplication 1 PPS signal and the external standard 1 PPS signal are used to ensure the synchronization of time scale signal. Afterwards, the digital look-up table which is based on the ROM in FPGA is used to realize the digital modulation of AC code. The whole design is easy to be realized and applied.
出处
《时间频率学报》
CSCD
2012年第4期218-227,共10页
Journal of Time and Frequency
基金
中国科学院"西部之光"人才培养计划重点资助项目(Y001YR1601)
