摘要
本文提出了采用多晶侧壁(PSSWS:Poly-Silicon Side-Wall Spacer)实现LDD MOSFET.研究了反应离子刻蚀(RIE)多晶硅的速率、各向异性性,对SiO_2、负胶的选择比,以及刻蚀的均匀性、过腐蚀度、负载效应等与刻蚀条件(包括气体、气体组分、流量、压力、射频功率、温度等)的关系.在此基础上,结合LDD MOSFET对侧壁宽度、可控性及重复性的要求,对反应离子刻蚀法实现PSSWS-LDD进行优化,获得了优化工艺条件.
The polysilicoa used as sidswall spacer for LDD MOSFET was proposed aad realized. Having studied the relationship between basic factors (Such as etching rate,anisotropy, selectives of poly-Si to SiO2 and to AZ,etching uniformity, overetching, loading effect) of reactive-ion-etchiag polysilicoa and etching conditions (i. e. gas, gas flow rate, pressures, radio frequency power, temperature, etc.), the etching process conditions for realizing PSSWS-LDD have been optimized.
出处
《固体电子学研究与进展》
CAS
CSCD
北大核心
1990年第3期288-293,共6页
Research & Progress of SSE
