摘要
基于对TD-LTE无线综合测试仪中DSP与FPGA之间并行数据通信技术的研究与分析,设计了一种基于FPGA的EMIF,可与片内接收模块进行数据传输。DSP在收到中断信号后,将数据通过EMIF传输到FPGA的片内接收模块,两片RAM通过乒乓结构的设计操作,完成对数据的接收。经过仿真、综合、板级验证、联机调试等工作,该设计方案实现了数据的正确传输,已应用于测试仪表的开发。
Based on the research and analysis of parallel data communication between DSP and FPGA in TD-LTE wireless comprehensive test instrument,an external memory interface（EMIF） for data transmission with on-chip receiving module was designed based on FPGA.On receiving the interrupt signal,DSP transferred data via EMIF to receiving module in the FPGA,and two RAM＇s with symmetrical ping-pang structure were used to receive data.The EMIF was simulated and synthesized.Results from PCB verification and on-line debugging validated the design.The scheme has been applied to development of test instruments.
出处
《微电子学》
CAS
CSCD
北大核心
2012年第5期688-691,共4页
Microelectronics
基金
国家科技重大专项资助项目"TD-LTE无线综合测试仪表开发"(2009ZX03002-009)
