摘要
数字正交下变频器DDC是数字接收机系统中的核心部件,其作用是将ADC数字化后输出的高速中频信号进行下变频、抽取降速和低通滤波,使之变为适合处理的基带信号。给出了DDC各模块在FPGA中高效实现的方法,并且利用嵌入式逻辑分析仪对系统加载板卡后的实时运行结果进行了测试分析。
Digital down converter DDC is the core technology in software radio receiver system. After converting down, speeding down and processed by low-pass filter, it can change the IF signal into baseband signal which is suitable for processing signal. This paper introduces a simply and flexible method to realize each module of DDC in FPGA, and get the real-time operation of the system with the SignalTap II logic analyzer.
出处
《电子技术应用》
北大核心
2012年第9期5-7,共3页
Application of Electronic Technique
