摘要
提出一种由主控器CPU、CPLD和闪存Flash组成的FPGA在线配置方法。闪存Flash用于存储FPGA的配置数据,CPLD读取闪存Flash中的配置数据,采用快速被动并行方式(FPP,Fast Passive Parallel)配置FPGA,主控器通过主控接口与CPLD通信,实现对闪存Flash中配置数据的更新和维护。
This paper presents a FPGA configuration method composed by master controller CPU, CPLD and RAM Flash. RAM Flash is used to store FPGA configuration data, and CPLD reads the configuration data from RAM flash. FPP （ Fast Pazsive Par- allel） method is adopted to configure FPGA. The main controller communicates with CPLD through its interfaces to update and maintain configuration data of RAM Flash. This paper also introduces several applications for this method.
出处
《计算机与现代化》
2012年第7期215-217,共3页
Computer and Modernization
