摘要
提出了一种新型高稳定LDO电路。该电路采用折叠型共源共栅运算放大器作为误差放大器,通过消除零点的密勒补偿技术提高环路稳定性;并在反馈电路中加入一种新的电压调整模块,以保证输入参考电压在一定范围内发生偏离时都能得到相同的输出电压。基于0.8μm 40VBCD工艺,对提出的LDO电路进行了HSPICE仿真验证。结果表明,在输入参考电压发生±17%的变化时,输出电压仅变化±3.8%。
An LOD linear regulator with high stability based on novel structure was presented. In this circuit, folded cascode amplifier was chosen as error amplifier, and Miller compensation was used to cancel right-half-plane zero, so as to improve loop stability of the circuit. A new voltage regulator topology was introduced into feedback network to ensure the same LDO output, in case of input reference voltage deviation in certain range. HSPICE sim- ulation based on 0.8μm 40 V BCD process showed that the circuit had an output voltage variation of only±3.8% when the input reference voltage changed ±17%.
出处
《微电子学》
CAS
CSCD
北大核心
2012年第3期380-382,共3页
Microelectronics
