摘要
介绍了一种高速双路数据采集系统 ,采用全TTL设计 ,采样率为 10 0MSPS。系统具有电源种类少、功耗小、电路设计和调试简单等特点 ,并对系统进行了动态测试 ,结果表明 ,系统的有效采样位数达到 7位以上 ,在数据学微处理领域有实际推广应用的价值。
A high-speed data acquisition system with two channels is described in this paper, which is designed by TTL logic completely and with a sample rate up to 100MSPS. The system has advantages of less kinds and low dissipation of power, simple circuit design and convenient circuit debug. A dynamic measurement is taken and the results show that the ENOB of the system is more than 7 bits.
出处
《系统工程与电子技术》
EI
CSCD
2000年第5期90-92,共3页
Systems Engineering and Electronics
