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以太网数字影像遥测编码器的硬件设计与实现 被引量:1

The Hardware Design and Implementation of Ethernet Digital Image Telemetry Encoder
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摘要 采用高性能微控制器和FPGA(field-programmable gate array)组合硬件平台,进行以太网数字影像数据的接收、满足IRIG106(inter range instrumentation group106)遥测标准的PCM(pulse code modulation)编程、IRIG-B时间码转换与配置、高速数据调度管理和多类型信号电平输出的硬件电路设计和制作。通过实验室和用户现场环境测试,验证了硬件设计的完整性和可靠性。 The ethernet digital image telemetry encoder has the problems of various function,complicated structure,required high real-time.We use the combination hardware platforms of high-performance microcontroller and FPGA(Field-Programmable Gate Array)to receive ethernet digital image data.The PCM(Pulse Code Modulation) frame format can be programmable and meet the standard of telemetry IRIG106(Inter Range Instrumentation Group 106),configuring and transforming IRIG-B time code.The dispatch and management are of high-speed and efficiency.The designing and making of hardware circuit about Multi-level signal output validated the accuracy and reliability of hardware circuit by the environment of laboratory and user site test.
出处 《数字通信》 2012年第1期49-54,共6页 Digital Communications and Networks
基金 重庆市科委科技攻关项目(CSTC2008AC2073) 重庆市教委科研项目(KJ100520)
关键词 以太网遥测编码器 微控制器 硬件电路 IRIG106遥测 PCM帧格式 telemetry encoder microcontroller hardware circuit telemetry IRIG106 PCM frame format
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