期刊文献+

锁相环中无源环路滤波器的设计与仿真 被引量:13

The design and simulation of passive loop filter in phase-locked loops
下载PDF
导出
摘要 锁相环(PLL)的基本频率特性主要是由环路滤波器决定的.为了节省锁相环的设计仿真时间,提高设计效率,提出一种基于ADS仿真平台的环路滤波器系统级设计与仿真方法.分析RC无源滤波器截止频率与锁相速度之间的关系;引入滞后超前滤波器结构,提高PLL的稳定性,还分析滞后超前滤波器的幅度-频率特性,以及影响相位返回量的因素,并基于ADS仿真平台分析相位返回量的大小与环路锁相速度之间的关系,为环路滤波器设计提供理论依据. the basic performance of phase locked loop(PLL) was mainly determined by the loop filter.In order to save the simulation time and improve the design efficiency,a kind of system-level design and hybrid simulation way was applied to loop filter design based on ADS software platform.The relationship between cut-off frequency and the phase-locking speed of RC delay filter was analyzed.In order to improve the stability of PLL,the lag-lead filter structure was introduced.Furthermore,the amplitude-frequency characteristics and factors of affecting the phase margin were analyzed in the lag-lead filter.Finally,the relationship between the phase margin and the Phase-locked speed was worked out based on ADS software,which provided theory references for loop filter design.
出处 《湖北大学学报(自然科学版)》 CAS 北大核心 2011年第4期494-497,共4页 Journal of Hubei University:Natural Science
基金 湖北省教学研究项目(2009164)资助
关键词 锁相环 无源滤波器 设计 仿真 锁相速度 PLL passive filter design simulation loop locked speed
  • 相关文献

参考文献4

  • 1Razavi B. Design of analog CMOS integrated circuits[M]. New York: McGraw-Hill Inc, 2001: 532-578. 被引量:1
  • 2Roland E Best.锁相环设计、仿真与应用[M].5版.北京:清华大学出版社,2007. 被引量:1
  • 3Best R E. Phase-locked loops theory, design, and applications[M]. 3rd. New York: McGraw-Hill Inc, 1995: 251-289. 被引量:1
  • 4远坂俊昭.锁相环(PLL)电路设计与应用[M].北京:科学出版社,2006. 被引量:44

共引文献43

同被引文献89

引证文献13

二级引证文献26

相关作者

内容加载中请稍等...

相关机构

内容加载中请稍等...

相关主题

内容加载中请稍等...

浏览历史

内容加载中请稍等...
;
使用帮助 返回顶部