摘要
采用了VHDL语言编程的设计方法,通过FPGA来实现按键消抖的硬件电路。论述了基于计数器、RS触发器和状态机3种方法来实现按键消抖电路,并给出仿真结果。通过下载到CycloneEP1C6T144芯片中进行验证,表明这3种方法设计的消抖电路都能够实现电路功能,其中有限状态机的方法更能确保每一次按键操作后准确输出按键确认信号,且性能稳定。
In order to solve key jitter of FPGA system,use the design method of VHDL language programming to realize key-jitter.Discusses three methods base on counter,RS flip-flop and state machine with simulation and analysis.Being verified by the CycloneEP1C6T144,the three methods all able to achieve the circuit function,can guarantee a quick keypress once every time the response,and have stable property.The main innovation is using the most simple programming to realize key-jitter.
出处
《电子设计工程》
2011年第22期1-3,共3页
Electronic Design Engineering
基金
吉林省教育厅科技项目(2010JYT09)
