摘要
Aim To design an ASIC based on CORDIC(coordinate rotations digital computer) to meet the requirement of coordinate conversion in high speed radar signal processing. Methods A new pipeline CORDIC architecture easily realized in VLSI was introduced. Results and Conclusion The results of hardware simulation with FPGA show that the pipeline CORDIC architecture meets the requirement.
目的设计ＣＯＲＤＩＣ（坐标旋转数字计算机）算法专用芯片，满足雷达信号高速坐标变换的要求．方法提出一种新的流水线ＣＯＲＤＩＣ结构，简单的移位和加减法运算以及各个流水单元结构的相似性极适合于ＶＬＳＩ实现．结果与结论用ＦＰＧＡ实现硬件仿真，仿真结果表明该ＡＳＩＣ的性能达到预期要求．
