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3D图形的裁剪算法及硬件实现技术研究 被引量:4

3D graphics clipping algorithm and hardware technology research
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摘要 随着计算机绘图规模的需要,借助辅助硬件资源,来提高图形处理单元(GPU)处理速度的需求越来越普遍。文章描述了一种裁剪引擎,它能够处理3D图形中的裁剪、透视除法以及视口映射的功能。硬件实现的难度取决于裁剪算法的复杂程度。我们在Sutherland-Hodgman裁剪算法的基础上提出一种新的裁剪算法,该算法通过去除冗余顶点以提高处理速度,同时利用编码来判断线段可见性的方法使得硬件实现变得很容易。最后,我们在FPGA上实现了这个裁剪引擎并且能够以3M个三角形/s的速度运行,满足了图形流水中的实时性要求。 With the need of computer graphics,the requirement of using assistant hardware to enhance the efficiency of GPU becomes more and more popular.This paper describes a clipping engine,which processes the view clipping,perspective division,and view-port mapping of 3D graphics.The dificultity of hardware implementation depends on the complexity of the clipping algorithm.On the basis of Hodgman-Sutherland algorithm,we propose a new clipping algorithm,which improves processing speed by eliminating redundant vertex,while using endpoint coding to judge the line whether visible makes hardware design become very easy.Finally,we implement the engine in FPGA,which can process 3M- triangle/s,meeting the real-time requirements.
出处 《电子技术(上海)》 2008年第2期44-48,共5页 Electronic Technology
关键词 三维图形 裁剪 现场可编程逻辑阵列 3D graphics clipping FPGA
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