摘要
根据dPMR标准,设计出一种基于FPGA实现信道编解码的系统。在标准算法基础上对电路结构进行优化处理,使该系统可以保证较高的实时性,并在占用硬件资源不大的条件下,符合dPMR标准的应用。
Based on the communication protocol of dPMR, architecture for implementing the channel coding on a FPGA chip is presented. The results show that the proposed system is low-delay and low-complexity by the optimization of circuit structure. The system can apply the protocol of dPMR.
出处
《电声技术》
2011年第10期65-67,共3页
Audio Engineering
