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基于FPGA的像素探测器数据缓存设计 被引量:1

Design and realization of pixel detector data buffer based on FPGA
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摘要 针对粒子对撞机像素探测器的数据缓存,提出了基于FPGA的解决方法。通过时序转换匹配模块,可以使用定制FIFO核实现对探测器模型的数据进行缓存。经过FPGA验证,在功能上达到了像素探测器模型的要求,对于粒子对撞机像素探测器的低成本工程验证具有显著的参考价值。 In order to solving data buffer problem of partical collider pixel detector model, this paper introduces a method based on FPGA device. By using time sequence switch module, it could use custom-built FIFO IP core for buffering data from pixel detector output. After testing on FPGA development board, this method could satisfy the requirement of pixel detector model, and it has remarkable reference value to experimentation of partical collider pixel detector project.
作者 杨萌 王祖强
出处 《电子技术应用》 北大核心 2011年第9期92-96,共5页 Application of Electronic Technique
关键词 FIFO FPGA 像素探测器 FIFO FPGA pixel detector
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