摘要
为了满足超大规模集成（ Ｖ Ｌ Ｓ Ｉ）并行系统和同步系统的需要，提出了一种以线网时延方差最小和时延均值小为目标的 Ｖ Ｌ Ｓ Ｉ版图布线算法，较好地解决了 Ｍ 规模并行系统及同步系统中时钟信号传输的均衡性问题，具有方法独特、算法简单、可并行处理等特点，实验结果运作良好。
This paper aims at solving the problem of blance of time delay in the large scale paralell or synchronous systems in VLSI design.The algorithm proposed in this paper has many characteristies,including being simultaneously procesed,considering both routed effective mathmaties model and getting a satisfatory result.
出处
《山东建材学院学报》
1999年第3期221-223,共3页
Journal of Shandong Institute of Building Materials
