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LDPC码快速编码器的DSP设计与实现 被引量:3

Fast Encoding of LDPC Codes Based on DSP
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摘要 对CCSDS 131.1-O-2(Experimental Specification)中提出的一类准循环LDPC删余码进行研究,分析了该类码的特点,并仿真了其性能;结合其特点,对编码中的"贪婪算法"进行一定的改进,设计了快速编码算法。通过对TMS320C6416 DSP平台的功能与运算技巧的结合,对编码算法代码进行合理优化,完成了快速编码器的DSP实现,编码速率达到30 Mbit/s。 The punctured Quasi-Cyclic Low-Density Parity-Check (QC-LDPC) code proposed by CCSDS 131.1-O-2 (Experimental Specification) is investigated. First, the characteristics of the codes are analyzed, and its decoding performance is simulated. Then, the encoding method called "Greedy Algorithm" combining with the code's character is improved, and a fast encoding method is proposed. At last, how to optimize the encoding method by taking good use of the functions afforded by the DSP TMS320C6416 platform and skills of operations is described. The encoding rate can achieve 30 Mbit/s based on DSP.
出处 《电视技术》 北大核心 2011年第7期49-51,55,共4页 Video Engineering
关键词 低密度奇偶校验码 准循环 删余 编码器 数字信号处理器 LDPC codes quasi-cyclic puncture encoder DSP
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参考文献10

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共引文献27

同被引文献21

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