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基于FPGA的智能合并单元设计仿真 被引量:5

Simulation of smart merging unit based on FPGA
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摘要 面向智能变电站信息数字化、功能集成化、结构紧凑化的要求,通过分析IEC 60044-8,IEC61850-9-1/2标准,设计了一种集数据接收、同步、处理、通信等功能于一体的电子式互感器智能合并单元。利用现场可编程门阵列(FPGA)丰富的I/O口、快速的可行性和可扩展性,实现了采集器与合并单元的数据接收,并且通过Lagrange插值算法实现多路数据的同步;同步数据通过有限脉冲(FIR)滤波和先进先出(FIFO)排序处理后,在FPGA中以FT3帧格式串口发送。本设计通过硬件VHDL语言,运用Altera公司的QuartusⅡ进行开发工作,并利用该软件自带的仿真工具验证了本设计的可行性。 Based on the requirements of digital information, functional integration and compact structure for intelligent substation, through analyzing IEC 60044-8, IEC 61850-9-1/2 standard, a set of data reception, synchronization, processing, and communication functions in one combined unit of intelligent electronic transformers were designed. Using FPGA' s rich I/O ports and a high degree of viability in the intelligent electronic transformer to receive the merging unit data synchronization module, a collector receiving unit interface module was achieved as well as the synchronization through the Lagrange interpolation function; mainly through the FIR filter and FIFO achieved the data processing module; data communication module was designed based on FPGA part of the FT3 frame format of transmission. Using hardware VHDL language, Ahera' s Quartus Ⅱ development work and the software simulation tool, the feasibility of this design was verified.
出处 《中国电力》 CSCD 北大核心 2010年第12期35-39,共5页 Electric Power
关键词 智能变电站 电子式互感器 智能合并单元 FPGA intelligent substation electronic transformer intelligent merging unit FPGA
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