期刊文献+

WCDMA无线直放站的Σ-Δ小数分频锁相环设计

Design of Sigma-Delta Fractional-N PLL for WCDMA Wireless Repeater
下载PDF
导出
摘要 根据WCDMA无线直放站锁相环的特点,结合Σ-Δ调制小数分频锁相环噪声低、分辨率高、步进小的优点,给出了一种适用于WCDMA无线直放站的基于Σ-Δ调制小数分频锁相环,并采用ADS工具对系统进行了仿真。仿真证明了基于Σ-Δ调制小数分频的WCDMA无线直放站锁相环模型的正确性,对WCDMA无线直放站锁相环设计有一定的指导意义。 According to the characteristics of PLL for WCDMA wireless repeater and advantages of low noise,high resolution,small steps of Σ-Δ modulated fractional-N PLL,a Σ-Δ modulated fractional-based PLL for WCDMA wireless repeater is proposed,and the system is simulated by ADS.Simulation results show that WCDMA wireless repeater PLL model based on the Σ-Δ modulated fractional-N is correct,and it has some significance to the WCDMA wireless repeater PLL design.
出处 《电讯技术》 北大核心 2010年第11期110-113,共4页 Telecommunication Engineering
基金 国家自然科学基金资助项目(NF010103) 广西教育厅科研项目(200708MS005) 广西自然科学基金资助项目(0832245)~~
关键词 WCDMA 无线直放站 Σ-Δ调制 三阶无源环路滤波器 小数分频 锁相环设计 WCDMA wireless repeater sigma-delta modulation third-order passive loop filter dicimal fractional frequency PLL design
  • 相关文献

参考文献7

二级参考文献25

  • 1朱瀚舟.小步进频率合成器的设计[J].现代雷达,2004,26(6):48-49. 被引量:6
  • 2张丽,王洪魁,张瑞智.三阶电荷泵锁相环锁定时间的研究[J].固体电子学研究与进展,2004,24(2):196-199. 被引量:6
  • 3吴永欣,张建立.∑-△调制技术在小数分频锁相环中的应用[J].无线电工程,2005,35(3):53-55. 被引量:5
  • 4杨永辉.脉冲信号对载波提取锁相环的干扰分析[J].通信技术,2007,40(5):6-8. 被引量:5
  • 5Brigati S, Francesconi E Modeling of fracfional-N division frequency synthesizers with SIMULINK and MATLAB [C]// The 8th IEEE International Conference on Electronics, Circuits and Systems, Sept 2-5, 2001. USA: IEEE, 2001: 081-1084. 被引量:1
  • 6Perrott M H. Fast and accurate behavioral simulation of fractional-N frequency synthesizers and other PLL/DLL circuits [C]// Proceedings of the 39th Design Automation Conference, 10-14 June 2002. USA: DAC, 2002: 498-503. 被引量:1
  • 7Kundert K. Predicting the Phase Noise and jitter of PLL-Based Frequency Synthesizers [EB/OL]. (2006-8) [2007-9]. www.designers-guide.com. 被引量:1
  • 8Xiaojian Mao, Huazhong Yang, Hui Wang. Behavioral modeling and simulation of jitter and phase noise in fractional-N PLL frequency synthesizer [C]// Proceedings of the 2004 IEEE International Behavioral Modeling and Simulation Conference, 21-22 Oct. 2004. USA: IEEE, 2004: 25-30. 被引量:1
  • 9Cassia M, Shah P, Bruun E. Analytical Model and Behavioral Simulation Approach for a ∑△ Fraetional-N Synthesizer Employing a Sample-Hold Element [J]. IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing (S1057-7130), 2003, 50(11): 850-859, 被引量:1
  • 10Connor C O.Develop a trimless voltage-controlled oscillator[J].Microwaves & RF.Jan.2000. 被引量:1

共引文献3

相关作者

内容加载中请稍等...

相关机构

内容加载中请稍等...

相关主题

内容加载中请稍等...

浏览历史

内容加载中请稍等...
;
使用帮助 返回顶部