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板级互连线的串扰规律研究与仿真 被引量:17

Simulating and study on rules of crosstalk of board-level interconnects
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摘要 串扰是高速电路板设计中干扰信号完整性的主要噪声之一;为有效地抑制串扰噪声,保证系统设计的功能正确,有必要分析串扰问题。针对实际PCB中互连线拓扑和串扰的特点,构建三线耦合均匀传输线模型,采用信号完整性仿真工具HyperLynx进行PCB布线前的LineSim串扰仿真,详细分析了高速PCB中多种因素:耦合长度、耦合间距、信号上升时间、介质厚度、端接等对近端和远端串扰宽度和幅值的影响;最后总结了串扰宽度及其幅值的变化规律,可有效的指导PCB设计中减小串扰噪声。 Crosstalk is one of the main noises that interfere with signal integrity in high speed circuit board design.In order to reduce crosstalk noise effectively and ensure the correct functionality in the system design,it is necessary to analyze crosstalk problems.Base on the topology of the interconnects in actual PCB and the feature of crosstalk,it sets up three-lines-coupled uniform transmission lines model,and uses signal integrity simulation tool HyperLynx to perform pre-routed PCB’s LineSim crosstalk simulation,and then it analyzes various factors that affect the width and magnitude values of near-end and far-end crosstalk in high-speed PCB:coupled length,coupled spacing,signal’s rise time,dielectric thickness,termination and so on.Finally,it summarizes rules of the width and magnitude values of crosstalk,which can give an effective guidance to reduce crosstalk noise in the PCB design.
出处 《电子测量技术》 2010年第8期9-12,17,共5页 Electronic Measurement Technology
基金 国家863计划(2009AA01Z310)
关键词 互连线 信号完整性 耦合 近端串扰 远端串扰 interconnects signal integrity coupled near-end crosstalk far-end crosstalk
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