摘要
软件无线电接收机,要求解调模式灵活可变,需设计一个基本的IQ正交解调模型,通过参数设置来改变解调模式。介绍一种四相相移键控(QPSK)的数字解调方案,以现场可编程门阵列(FPGA)来实现NCO、DDS、数字相乘、FIR滤波等关键算法。通过原理设计、Simulink系统仿真、VerilogHDL语言编程和FPGA实现,完成了QPSK数字解调器的电路设计,通过仿真并下载试验,得到了良好的解调质量。
Software-radio receiver,requires a flexible and variable demodulation mode,thus it is necessary to design a basic model of IQ quadrature demodulation,and by parameters setting,to change the demodulation mode.The paper describes a overall scheme of QPSK digital coherent demodulation,including the key algorithm for achieving NCO,DDS,digital multiplication and filtering by FPGA.In this paper,QPSK demodulator design is completed by using principle design,Simulink simulation,Verilog HDL language programming and FPGA.The downloading experiments indicate that this system possesses a good quality of demodulation.
出处
《通信技术》
2010年第7期61-63,共3页
Communications Technology
基金
国家自然科学基金资助项目--基于软件无线电的中频数字化接收机技术研究(批准号:10876035)
