摘要
针对SOPC Builder系统没有提供128064液晶模块驱动的问题,以CBG128064液晶模块为例,采用有限状态机,用Verilog HDL语言设计了显示驱动IP核,并构建了基于NiosⅡ嵌入式处理器的片上系统。通过把显示驱动IP核下载到Cyclone系列FPGA上,验证了该设计的可行性。
To solve the problem of there being no 128064 LCD driver in SOPC Builder system, taking CBG128064 LCD module as an example, a display driver IP core is designed using Finite State Machine（FSM） and Verilog HDL ,and an on-chip system based on NiosⅡ embedded processor is built. The IP core is validated by downloading the display driver IP core into Cyclone series FPGA.
出处
《单片机与嵌入式系统应用》
2010年第6期16-18,共3页
Microcontrollers & Embedded Systems
