摘要
随着编码理论和多媒体网络应用的发展,图像和视频压缩编码JPEG2000系统应用得到逐步推广。在此从视频采集中I2C总线的特点、协议入手,着重对I2C总线设计及实现方法进行介绍。基于视频采集芯片SAA7111,提出采用VHDL语言来模拟实现I2C总线接口的方法,并将其嵌入到FPGA中。实验仿真结果证明数据是正确、稳定、可靠的,具有一定的可借鉴性。
With development of the coding theory and multimedia network application, the application of the image and video compression coding JPEG2000 system have been extended gradually. Proceeding with the characteristics and protocol of the I2C bus in the video acquisition, the design and realization method of I2C bus are introduced emphatically.Based on the video acquisition chip SAA7111, the method to simulate and realize the I2C bus interface by the did of VHDL language, and embed it into FPGA is proposed. The simulation results show that the data is correct stable and reliable.
出处
《现代电子技术》
2010年第8期80-82,共3页
Modern Electronics Technique
