摘要
Total dose effects and annealing behavior of domestic n-channel VDMOS devices under different bias conditions were investigated. The dependences of typical electrical parameters such as threshold voltage, breakdown voltage, leakage current, and on-state resistance upon total dose were discussed. We also observed the relationships between these parameters and annealing time. The experiment results show that： the threshold voltage negatively shifts with the increasing of total dose and continues to decrease at the beginning of 100 ℃ annealing; the breakdown voltage under the drain bias voltage has passed through the pre-irradiation threshold voltage during annealing behaving with a ＂rebound＂ effect; there is a latent interface-trap buildup （LITB） phenomenon in the VDMOS devices; the leakage current is suppressed; and on-state resistance is almost kept constant during irradiation and annealing. Our experiment results are meaningful and important for further improvements in the design and processing.
Total dose effects and annealing behavior of domestic n-channel VDMOS devices under different bias conditions were investigated. The dependences of typical electrical parameters such as threshold voltage, breakdown voltage, leakage current, and on-state resistance upon total dose were discussed. We also observed the relationships between these parameters and annealing time. The experiment results show that： the threshold voltage negatively shifts with the increasing of total dose and continues to decrease at the beginning of 100 ℃ annealing; the breakdown voltage under the drain bias voltage has passed through the pre-irradiation threshold voltage during annealing behaving with a ＂rebound＂ effect; there is a latent interface-trap buildup （LITB） phenomenon in the VDMOS devices; the leakage current is suppressed; and on-state resistance is almost kept constant during irradiation and annealing. Our experiment results are meaningful and important for further improvements in the design and processing.
