摘要
为提高XCP中三路调频信号鉴频解调的抗干扰性能,采用脉冲计数式鉴频解调法,鉴频中采用倍频技术,提高了鉴频灵敏度。由参考信号发生器产生正交CQR和同相CIR两个参考信号,利用这两个相互正交的同步信号,并行控制多路脉冲计数器实施数字鉴频。采用现场可编程逻辑门阵列FPGA进行鉴频器硬件电路设计来降低系统复杂度并提高系统稳定性。测试结果表明,系统完全满足精度及可靠性等方面要求。
Three XCP FM signals are taken pulse counting discrimination to improve the anti-interference performance in frequency discrimination, while frequency multiplier technology are used to enhance the sensitivity of the frequency. The reference signal generator produce two-phase reference signal CQR and CIR which corresponding to orthogonal and in-phase, then these two simultaneous orthogonal signals are used to control the frequency discrimination implementation of multi-channel pulse counter collaterally. The hardware designation of frequency discrimination based on FPGA may reduce system complexity and improve system stability performance. The actual tests results show that the system completely meets the accuracy and reliability requirements and so on.
出处
《自动化与仪表》
北大核心
2010年第1期6-9,共4页
Automation & Instrumentation
基金
国家高技术研究发展计划(863)资助项目(2006AA09A304)
关键词
投弃式海流剖面测量仪
鉴频
脉冲计数
调制信号
现场可编程逻辑门阵列
expendable current profiler （XCP）
frequency discrimination
pulse counting
modulation signal
field programmable gate arrays（FPGA）
