摘要
介绍了采用0.18μm数字工艺制造、工作在3.3V下、10位100MS/s转换速率的流水线模数转换器。提出了一种适用于1.5位MDAC的新的金属电容结构,并且使用了高带宽低功耗运算放大器、对称自举开关和体切换的PMOS开关来提高电路性能。芯片已经通过流片验证,版图面积为1.35mm×0.99mm,功耗为175mW。14.7MS/s转换速率下测得的DNL和INL分别为0.2LSB和0.45LSB,100MS/s转换速率下测得的DNL和INL分别为1LSB和2.7LSB,SINAD为49.4dB,SFDR为66.8dB。
A 3.3 V 10 bit 100 MS/s pipelined ADC in 0.18 μm digital CMOS process is presented.A new metal-finger capacitor structure for 1.5 bit MDAC is proposed.High bandwidth low power operational amplifiers（opamps）,symmetrical bootstrapped switch and bulk-switching PMOS switch are employed in this ADC design to enhance circuit performance.The chip has been fabricated,occupying 1.35 mm×0.99 mm and consuming 175 mW.The measured differential nonlinearity（DNL）and integral nonlinearity（INL）are less than 0.2 LSB and 0.45LSB, respectively at 14.7 MS/s and less than 1 LSB and 2.7 LSB, respectively at 100 MS/s. The signal- to-noise-and-distortion ratio （SNDR） and spurious-free-dynamic range （SFDR） are 49.4 dB and 66.8 dB, respectively for a full-scale input at 100 MS/s.
出处
《固体电子学研究与进展》
CAS
CSCD
北大核心
2009年第3期417-422,454,共7页
Research & Progress of SSE
关键词
流水线模数转换器
数字工艺
金属叉指电容
对称自举开关
体切换开关
pipelined ADC
digital CMOS process
metal-finger capacitors
symmetrical bootstrapped switch
bulk-switching PMOS switch
