期刊文献+

基于FPGA的DDR2 SDRAM接口信号完整性设计与验证 被引量:3

The design and verification based on FPGA for integrity of DDR2 SDRAM interface signals
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摘要 对高速DDR2 SDRAM接口信号进行完整性仿真分析,并根据仿真结果得到相应PCB设计规则,最终通过使用FPGA实现了对大容量DDR2 SDRAM的读写控制,板卡验证测试,达到了预期的效果。 The simulation and analysis of the integrity of high-speed DDR2 SDRAM interface signals are performed, and the corresponding PCB design rules are obtained according to the simulation results. Finally the R/W control and board verification for the large-capacity DDR2 SDRAM is implemented through FPGA, and the prospective effect is reached.
出处 《雷达与对抗》 2009年第2期60-64,共5页 Radar & ECM
关键词 FPGA DDR2 SDRAM SODIMM HYPERLYNX IBIS 信号完整性 FPGA DDR2 SDRAM SODIMM Hyperlynx IBIS signal integrity
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参考文献9

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共引文献31

同被引文献16

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