摘要
提出了一种符合ISO/IEC18000-6C标准的无源RFID(射频识别)标签的低成本阻抗匹配网络。该设计基于复功率波反射系数的概念,修正芯片输入阻抗,在片内添加阻抗匹配电路。通过变化芯片阻抗和天线共轭匹配及失配间切换,有效完成信号的调制反射。提出的电路结构简单,易于实现,在读写器、标签天线和芯片之间实现了功率传输的最大化,提高了芯片输入电压以及读写器对标签反射信号的识别率。采用该阻抗匹配网络的芯片基于chartered 0.35μm CMOS工艺实现。测试结果表明,在923MHz频带下,倍压电路输出可达1.47V,标签满足系统设计要求。
A low-cost impedance matching network for compliant ISO/IEC 18000-6C passive UHF RFID tag is presented. Based on complex power wave reflection coefficient, the on-chip matching network is designed through modifying the chip input impedance which varies between conjugate match and mismatch with the tag antenna to modulate the backscattered signals effectively. This matching network with simple structure can maximize the power transfer between the reader, antenna and chip, increase the input supply voltage and improve the identifiability of the backscattered signals. The tag chip with this impedance matching network has been fabricated with chartered 0. 35 μm CMOS process. Operated in the 923 MHz band, experimental measurement shows that the output of the voltage multiplier is up to 1.47 V, and the tag meets the specification of the system.
出处
《固体电子学研究与进展》
CAS
CSCD
北大核心
2009年第2期215-219,共5页
Research & Progress of SSE
关键词
射频识别
标签
阻抗匹配网络
调制反射
复功率波反射系数
RFID
tag
impedance matching network
modulated backscatter
complex power wave reflection coefficient
