摘要
论文旨在利用混合信号硬件描述语言Verilog-AMS对DC-DC变换器进行行为级的稳定性分析设计。混合信号硬件描述语言既具有描述数字电路和模拟电路的能力,又具有描述系统行为和电路性能的能力,成为系统级和行为级设计的最佳选择。通过Verilog-AMS为DC-DC变换器各个模块建立行为级模型,行为级模型简化了系统环路稳定性分析和补偿网络的设计,利用Cadence公司的Spectre仿真器对模型进行行为级仿真验证。
Based on the stability analysis of the DC-DC converter, behavioral models are built with mixed-signal hardware description languages, Verilog-AMS. Mixed-signal hardware description languages are used to obtain a shared design representation. The system engineers can build an architectural-level description of the design constructed from behavioral models of each of the blocks that can be evaluated by each of the circuit designers. Behavioral models ease the stability analysis of the closed system and the design of the compensation filter. Simulations are performed to verify the proposed models with Spectre.
出处
《长治学院学报》
2009年第2期29-32,共4页
Journal of Changzhi University
