摘要
随着集成电路设计技术及工艺技术的发展,元器件的工作频率越来越高,对微电子封装技术的要求也越来越严格。目前,BGA与MCM作为逐渐普及的封装形式,其基板上都有大量的过孔,在高频时必须考虑过孔寄生参数对芯片电性能的影响,特别是针对于射频电子和高速数字IC。文章以CBGA基板过孔为例,通过有限元方法初步探讨了不同参数的过孔其寄生参数RLC的变化趋势。并以其中一组寄生参数分析了对某理想放大器电路输出波形造成的过冲与畸变等影响。
With the development of semiconductor technology, the IC frequency become higher and higher, and the IC package become more and more importance. Currently, there are many vias in BGA and MCM that are becoming popular, so parasitical parameter of via must be considered especially for RFIC and MMIC component. It was discussed by finite element simulation and analysis in this paper that the different standard gold bonding wires have different effects on the parasitical parameter and the electrical performance of one ideal amplifier.
出处
《电子与封装》
2009年第1期12-15,共4页
Electronics & Packaging
关键词
过孔
封装寄生参数
电性能仿真
via
package parasitical parameter
electrical simulation
