摘要
提供了一个利用现场可编程门阵列(FPGA)实现正交直接数字合成(DDS)专用电路的设计实例。该电路的系统时钟速度可达50MHz,具有10bit分辨率的正弦和余弦输出。该电路具有BPSK、BFSK、LFM和脉冲调制功能,调制速度可达系统时钟频率速度。由于采用了FPGA技术,该电路使用方便,并能够与其它电路结合实现系统集成。
A design example of FPGA -based quadrature direct digital synthesizer (DDS) chip is presented. The chip synthesizes 10 bit sine and cosine waveforms with a 50MHz maximum clock frequency. The chip is capable of BPSK. BFSK,LFM and pulse modulation. These modulation capabilities operate up to the maximum clock frequency. This chip is easy to use and can be combined with other circuits for system integration.
出处
《现代雷达》
CSCD
北大核心
1997年第6期95-99,共5页
Modern Radar
关键词
直接数字合成
FPGA
频率合成
direct digital synthesis (DDS), filed programmable gate array (FPGA), freqency synthesis, modulation, linear freqency modulation (LFM)
