摘要
接收器电路是高速串行接口电路中关键模块.基于数字化模拟电路和负反馈动态调整技术设计了一种用于高速串行接口USB2.0接收器的高精度片上匹配电阻电路.使用TSMC(Taiwan Semiconductor Manufacturing Company Ltd)的CMOS 0.25 um混合信号模型,在Cadence软件环境下用spectre仿真器模拟,结果表明在500Mbps的高速时钟信号作用下,所设计的匹配电阻阻值稳定在[44.3Ω,45.6Ω]范围内,最大稳定时间6μs,平均误差±1.45%,最大误差1.56%;整合了这种高精度片上电阻的USB2.0接收器可以正确接收500 Mbps高速串行数据.
Receiver is a key module in high-speed serial link. Involved in digital-based analog circuit-design technology and negative-feedback dynamic adjustment method, this paper brings forward a novel high-precision on chip termination resistor circuit in high-speed serial receiver. Using Cadence＇s SPECTRE software and TSMC＇s library of 0.25 μm mixed-signal CMOS model, the simulation results reveal that the value of termination resistor in this paper range within [44.3 Ω,45.6 Ω], meanwhile the maximum time leveling off is less than 6μs,the average error is ± 1.45 %, maximum error ranges within 1.56 % ,and meets with the protocol requirement of 45Ω± 10%. Receiver with the designed resistor circuit receives 500 Mbps serial data properly.
出处
《河南师范大学学报（自然科学版）》
CAS
CSCD
北大核心
2008年第5期61-64,共4页
Journal of Henan Normal University(Natural Science Edition)
基金
国家自然科学基金(60678045)
