摘要
本文重点介绍了K5体系结构设计的两个重要特点：（1）如何将X86这样的CISC指令转化为类似于RISC指令的ROP；（2）K5的流水线的动态调度技术，即它如何利用保留站、缓冲池（ROB）去检测指令间的数据依赖关系并保证程序执行语义的正确性。最后，我们对这些技术作了进一步讨论，看如何利用它们，以解决象VLIW这样的体系结构设计中所面临的软件兼容性等问题。
In this paper, we illustrate two important aspects during the design phase of the AMD-K5 architecture: 1)how to convert CISC-like instruction such as X86 into R0P ;2)the dynamic pipeline scheduling technology, that is, how to check the data dependency between instructions and gurantee the validity of programs. At last, by applying the design methodology of AMD-K5, we solve the problem of compatibility between VLIW-like architecture and CISC-like arcbitecture.
出处
《微机发展》
1997年第5期32-36,共5页
Microcomputer Development
关键词
微处理器
体系结构
K5
RISC
RISC
CISC
ROP
ROB
Reservation Station
Pipeline Sheduling
Data Dependency Checking
