摘要
为了使计算机能够通过串口控制FPGA的输出信号,笔者根据异步串行通信的原理,设计了简便易行的FPGA串行通信接口系统,并应用VHDL语言在FPGA内部集成了串行接收模块,具有较强的通用性和推广价值。
In order to control the FPGA＇s output through serial port, According to the principles of asynchronous series communication, the author designs a simple and convenient system of FPGA＇s series communication interface, and also integrates a model in FPGA for receiving series data with VHDL language, which can be more useful and have more spread value.
出处
《微计算机信息》
北大核心
2008年第26期137-138,73,共3页
Control & Automation
