摘要
I2C总线是一种二线制串口通信总线,首先简要介绍了I2C总线的工作原理,然后分析了接口模块的结构及其电路模型的搭建,并重点研究了用有限状态机对I2C总线接口的FPGA设计,最后进行了功能仿真。
I2C is a binary serial communication bus, this paper introduces the basic principle of the I2C-bus firstly, then the structure of interface module and the circuit model is analyzed. The FPGA design by FSM for I2C-bus interface module is also given. At last, the functional simulation is performed.
出处
《信息技术》
2008年第7期68-70,共3页
Information Technology
