摘要
近年来,集成电路制造工艺的巨大提高使得FPGA有能力实现大的数字系统电路。这些大的系统通常需要大量的存储器以存储数据。很多FPGA生产商已经推出了含有大的嵌入式存储器的FPGA芯片。然而,大多数学术方面的CAD工具只针对于同质的FPGA结构(即只包括逻辑模块和布线通道的FPGA结构)。FPGA的布线结构通常被表示为RRG(布线资源图)。本文将介绍一种包含嵌入式存储器模块的FPGA的灵活结构以及一种建立RRG的方法。文中我们对VPR(versatile placing and routing)进行了改进,使得VPR可以处理包含嵌入式存储器结构的FPGA的布局布线问题,同时保持了VPR的灵活性。
Recent dramatic improvements in integrated circuit fabrication technology have led to Field-Programmable Gate Arrays （FPGAs） capable of implementing entire digital systems. These large systems often require significant amounts of storage. FPGAs with large embedded memory arrays have been supplied by FPGA vendors. However, most of academic FPGA CAD tools target homogeneous FPGAs （one type of routing channel and function block）. FPGA routing architectures are usually represented as a routing resource graph （RRG）. In this paper we present a versatile architecture for FPGAs with embedded memory and the scheme to build the RRG. Our enhancements to the VPR （Versatile Place and Route） extend its functionality to FPGAs with embedded memory, while not reducing the versatility at all.
出处
《微计算机信息》
北大核心
2008年第20期219-220,97,共3页
Control & Automation
