摘要
提出了一种采用Matlab/Simulink技术实现数字滤波器的IP核设计方案.介绍了一种现代DSP设计工具DSP Builder.给出了基于FPGA的数字滤波器IP核的实现流程,并以一个16阶的低通FIR数字滤波器为例,采用DSP Builder建立了实现模型,利用Matlab进行了仿真,最后生成IP核.
A design scheme which realizes digital filter IP core is proposed by using Matlab/Simulink technology, and a kind of new DSP design tool,DSP Builder,is introduced. Besides, the flow of FIR digital filter IP core is presented based on EPGA. Finally,the IP core is produced on the basis of the taking 16-step low pass FIR digital filter as an example, using DSP Builder to estabish the realization model and carrying on the simulation by using Matlab.
出处
《兰州交通大学学报》
CAS
2008年第3期111-113,共3页
Journal of Lanzhou Jiaotong University
