摘要
基于图像采集系统高速、大容量的特点,提出了一种以FPGA芯片为核心处理器件的CMOS图像传感器数据采集系统的设计方案。系统将模块化结构设计、LVDS与乒乓存储等多项技术应用于设计过程中,保证了数据采集和传输的实时性。详细介绍了图像采集、数据传输、时序控制和数据解串等模块的工作原理及实现方法。实际应用证明,该系统实现了对数据量达590MPix-els/s的图像序列的数据采集、传输和存储,大大方便了后续图像处理电路的设计与实现。
This paper researches a design project of CMOS image sensor data acquisition system based on FPGA chip.The system uses the module structure design,LVDS and ping-pang store technologies,and ensures the real-time performance of data acquisition and transmission.h introduces the operating principles and realization methods of image acquisition,data transition,sequential control and data deserializing modules.The experiment eertifieates the system realizes image aequisition,transmission and memory to 590 MPixels/s data size, and makes for the design and realization of the subsequent circuit greatly.
出处
《计算机工程与应用》
CSCD
北大核心
2008年第21期46-48,105,共4页
Computer Engineering and Applications
基金
国家质检总局青年科技基金( the Natural Science Foundation for Young Scientists of General Administration of Quality Supervision
In-spection and Quarantine
China under Grant No.Q01-07)
关键词
FPGA
图像采集
数据传输
时序控制
FPGA
image acquisition
data transition
sequential control
