摘要
利用基于PSL断言的验证方法验证了宽带电路交换芯片XYDXC160的设计。该芯片单片支持64路2.488Gb/s STM-16帧结构的SDH码流的输入/输出,实现1 024×1 024 STM-1流的无阻塞电路交换。断言技术的引入,降低了验证工作的复杂度,提高了验证的速度和效率,确保了验证工作的质量。
This paper presents a new verification methodology that uses PSL assertion to verify broadband digital cross connection chip XYDXCI60, which supports 64 links SDH traffic of STM-16 frame at a speed of 2.488Gb/s and carries out l 024xl 024 full exchange with the grain of STM-1. By adopting the assertion technology, it successfully deals with the complexity of verification effectively and quickens the verification process.
出处
《计算机工程》
CAS
CSCD
北大核心
2007年第14期216-218,235,共4页
Computer Engineering
基金
国家自然科学基金资助重大项目(90207015)
国家"863"计划基金资助重大专项课题"超大规模集成电路设计"(2003AA1Z1190)
关键词
基于断言的验证
同步数字系列
性质描述语言
assertion-based verification
synchronous digital hierarchy(SDH)
property specification language(PSL)